Altera Sets the Standard for Productivity in High-Density Design With Latest Quartus II Software
Includes FPGA Industry's First Incremental Compilation Feature
SAN JOSE, Calif., May 2 /PRNewswire-FirstCall/ -- Altera Corporation (NASDAQ: ALTR) today announced that it is shipping version 5.0 of its Quartus(R) II design software, featuring the FPGA industry's first incremental compilation feature. With up to 70 percent faster design compilation times, engineers using Quartus II software version 5.0 for their high-density Stratix(R) II designs now have the fastest path to design completion. This release also enables significant productivity gains in the crucial areas of timing closure, system integration with soft embedded processors and external processors, and I/O pin planning.
"Altera is winning the high-density market space with Stratix II FPGAs and HardCopy(R) series of structured ASICs in large part because of the productivity advantage of Quartus II software," said Chris Balough, Altera's director of software and Nios(R) marketing. "In addition to being number one in performance, Quartus II software version 5.0 introduces substantial innovations that solidify its productivity leadership."
A clear indication of Quartus II software technology leadership is the 70 percent growth of active commercial licenses in 2004. Quartus II software was also awarded "Reader's Choice" by the FPGA and Programmable Logic Journal. In addition, Quartus II software version 5.0 delivers higher performance on 90-nm Stratix II FPGAs when compared to the performance of Xilinx's Virtex-4 family using ISE software version 7.1i.
New High-Density Productivity Features
Incremental compilation enables designers to break designs into physical and logical partitions for synthesis and fitting. This feature supports block-based design, which allows the designer to preserve the performance of specific blocks while other blocks are undergoing optimization. Designers can see timing closure improvements by using advanced optimization techniques, such as physical synthesis, to target specific design partitions while leaving other modules untouched.
Other productivity features for high-density designs include:
-- Fast timing estimates and early placement constraints -- Quartus II software can now provide timing estimates and identify critical timing paths for a high-density design up to 45 times faster than when running a full compilation.
-- SOPC Builder enhancements -- SOPC Builder, included in the Quartus II software, is the first tool to automate the process of building and integrating embedded systems. Two new enhancements further support high-density FPGAs:
-- An easy interface to external processors using PCI, external memory
interfaces (EMIF), and custom processor interfaces.
-- Support for inter-processor communication and safe sharing of
resources for multiple processor systems.
-- New I/O pin planner -- This feature eases the process of assigning and validating pin assignments for high-density and high-pin-count designs.
-- HardCopy II Advisor -- The HardCopy II Advisor tool guides the user through the migration process from a Stratix II FPGA to a HardCopy II structured ASIC.
-- Infrastructure enhancements for high-density designs -- Quartus II software version 5.0 lowers the physical memory used for compilation so most designs targeted at high-density Stratix II devices can be developed on standard PCs with just 2 Gbytes of memory. This release also adds support for 64-bit Red Hat Linux and Sun Solaris operating systems.
Pricing and Availability
Both the subscription edition and the web edition of Quartus II software version 5.0 are now available. The subscription edition is now shipping to all customers with an active software subscription. The free Quartus II Web Edition software can be downloaded for free from http://www.altera.com/q2webedition. Altera's software subscription program simplifies the process of obtaining Altera(R) design software by consolidating software products and maintenance charges into one annual subscription payment. The annual subscription for the Altera design software is $2,000 for a node-locked PC license. Quartus II design software supports major operating systems, including Windows XP; Windows 2000; Windows NT; Sun Solaris 8 and 9; Red Hat Linux 7.3, 8.0, and Enterprise 3.0 WS; and HP-UX 11.0. New or existing customers may obtain a software subscription online at the Altera web site, http://www.altera.com/, or from Altera distributors worldwide.
About Altera
Altera Corporation is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com/.
NOTE: Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder.
Editor Contacts:
Bruce Fienberg
Altera Corporation
408-544-6397
newsroom@altera.com
CONTACT: Bruce Fienberg of Altera Corporation, +1-408-544-6397, or
newsroom@altera.com
Web site: http://www.altera.com/
|
